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Merkki
STMicroelectronicsFamily Name
STM32H7
Package Type
LQFP
Mounting Type
Surface Mount
Pin Count
176
Device Core
ARM Cortex M7
Data Bus Width
32bit
Program Memory Size
2 MB
Maximum Frequency
400MHz
RAM Size
1 MB
USB Channels
2
Number of PWM Units
2 x 32 bit
Number of SPI Channels
6
Number of I2C Channels
4
Typical Operating Supply Voltage
3.6 (Maximum) V
Number of UART Channels
4
Number of USART Channels
4
Number of CAN Channels
2
Number of Ethernet Channels
1
Number of PCI Channels
0
Program Memory Type
Flash
Length
24.1mm
ADCs
20 x 16 bit
Height
1.45mm
Number of LIN Channels
4
Width
24.1mm
Number of ADC Units
3
Maximum Operating Temperature
+85 °C
Dimensions
24.1 x 24.1 x 1.45mm
Pulse Width Modulation
2 (2 x 32 bit)
Maximum Number of Ethernet Channels
1
Minimum Operating Temperature
-40 °C
Instruction Set Architecture
RISC
€ 89,50
€ 17,90 kpl (toimitus tarjottimella) (ilman ALV)
€ 112,32
€ 22,46 kpl (toimitus tarjottimella) (Sis ALV:n)
Tuotantopakkaus (Tarjotin)
5
€ 89,50
€ 17,90 kpl (toimitus tarjottimella) (ilman ALV)
€ 112,32
€ 22,46 kpl (toimitus tarjottimella) (Sis ALV:n)
Tuotantopakkaus (Tarjotin)
5
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Määrä | Yksikköhinta |
---|---|
5 - 9 | € 17,90 |
10+ | € 17,40 |
Tekninen dokumentti
Tekniset tiedot
Merkki
STMicroelectronicsFamily Name
STM32H7
Package Type
LQFP
Mounting Type
Surface Mount
Pin Count
176
Device Core
ARM Cortex M7
Data Bus Width
32bit
Program Memory Size
2 MB
Maximum Frequency
400MHz
RAM Size
1 MB
USB Channels
2
Number of PWM Units
2 x 32 bit
Number of SPI Channels
6
Number of I2C Channels
4
Typical Operating Supply Voltage
3.6 (Maximum) V
Number of UART Channels
4
Number of USART Channels
4
Number of CAN Channels
2
Number of Ethernet Channels
1
Number of PCI Channels
0
Program Memory Type
Flash
Length
24.1mm
ADCs
20 x 16 bit
Height
1.45mm
Number of LIN Channels
4
Width
24.1mm
Number of ADC Units
3
Maximum Operating Temperature
+85 °C
Dimensions
24.1 x 24.1 x 1.45mm
Pulse Width Modulation
2 (2 x 32 bit)
Maximum Number of Ethernet Channels
1
Minimum Operating Temperature
-40 °C
Instruction Set Architecture
RISC