Technical Document
Specifications
Brand
Texas InstrumentsProduct Type
Buffer
Logic Family
LVC
Logic Function
Schmitt Trigger Buffer
Number of Channels
1
Schmitt Trigger Input
Yes
Input Type
Single Ended
Output Type
Single Ended
Mount Type
Surface
Polarity
Non-Inverting
Minimum Supply Voltage
1.65V
Package Type
SOT-23
Maximum Supply Voltage
5.5V
Pin Count
5
Maximum Propagation Delay Time @ CL
5ns
Minimum Operating Temperature
-40°C
Maximum High Level Output Current
-32mA
Maximum Operating Temperature
85°C
Maximum Low Level Output Current
32mA
Length
2.9mm
Standards/Approvals
No
Width
1.6 mm
Series
SN74LVC1G17
Height
1.15mm
Supply Current
-50mA
Automotive Standard
No
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
Stock information temporarily unavailable.
€ 2.45
€ 0.098 Each (In a Pack of 25) (Exc. Vat)
€ 3.07
€ 0.123 Each (In a Pack of 25) (inc. VAT)
25
€ 2.45
€ 0.098 Each (In a Pack of 25) (Exc. Vat)
€ 3.07
€ 0.123 Each (In a Pack of 25) (inc. VAT)
Stock information temporarily unavailable.
25
Technical Document
Specifications
Brand
Texas InstrumentsProduct Type
Buffer
Logic Family
LVC
Logic Function
Schmitt Trigger Buffer
Number of Channels
1
Schmitt Trigger Input
Yes
Input Type
Single Ended
Output Type
Single Ended
Mount Type
Surface
Polarity
Non-Inverting
Minimum Supply Voltage
1.65V
Package Type
SOT-23
Maximum Supply Voltage
5.5V
Pin Count
5
Maximum Propagation Delay Time @ CL
5ns
Minimum Operating Temperature
-40°C
Maximum High Level Output Current
-32mA
Maximum Operating Temperature
85°C
Maximum Low Level Output Current
32mA
Length
2.9mm
Standards/Approvals
No
Width
1.6 mm
Series
SN74LVC1G17
Height
1.15mm
Supply Current
-50mA
Automotive Standard
No
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22


