STMicroelectronics, Surface Microphone Condenser

IEEE 802.3bt PoE-PD interface with embedded dual active bridge

The PM8805 is a system in package for Power over Ethernet (PoE) and powered devices (PD) applications. It embeds: two active bridges and their driving circuitry, a charge pump to drive high-side MOSFETs, the hot-swap MOSFET and the standard single-signature interface IEEE 802.3bt-compliant, including detection, classification, UVLO and inrush current limitation. The active bridges sustain up to 1 A current and the hot-swap MOSFET is designed to safely work up to 2 A. The device performs IEEE 802.3bt physical layer classification scheme, providing the system with an indication of successful PSE-type. The device identifies a 4-pair PSE, monitoring the pairs of the Ethernet cable and providing the system with a dedicated matrix of Tx signals. The device works with power either from the Ethernet cable or from an external power source such as a wall adapter, with the likelihood of the auxiliary source being prevalent over PoE. The device is suitable to build the interface section of PoE switch mode power supplies targeting the highest conversion efficiency. It provides a PGD signal that can be used to enable a PWM controller, a DC-DC converter or a LED driver.

Key features

•System in package:
Dual-active-bridge with 100 V MOSFETs and 0.2 Ω total path resistance
100 V, 0.1 Ω hot-swap MOSFETs
PoE-PD single-signature interface, IEEE 802.3af/at/bt (draft 2.3)-compliant
•Detection and support of high power, 4-pair applications
•Support 12 V auxiliary sources
•Identifies which kind of PSE (standard or legacy) is connected and provides successful IEEE802.3 af/at/bt classification indications as combination of T0, T1 and T2 signals (open-drain)
•Smart operational mode selection by command signals: STBY, RAUX and FAUX

• Programmable classification current with 3.3 ms delay
• Autoclass feature (optional)
• Advanced energy-saving MPS timings
• Hot-swap current protection in two steps: DC with 1 ms delay and short-circuit with 10 μs delay
• Start-up phase (pre-charge of the output capacitor) due to an internally limited current source
• PGD signal (open-drain) to enable an external PWM controller
• Thermal shutdown protection
• VFQFPN package with 6 exposed pads